This course can also be taken for academic credit as ECEA 5361, part of CU Boulder’s Master of Science in Electrical Engineering degree.
Este curso forma parte de Programa Especializado - FPGA Design for Embedded Systems
ofrecido por
Programa Especializado - FPGA Design for Embedded SystemsUniversidad de Colorado en BoulderAcerca de este Curso
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Certificado para compartir
Obtén un certificado al finalizar
100 % en línea
Comienza de inmediato y aprende a tu propio ritmo.
Curso 2 de 4 en
Fechas límite flexibles
Restablece las fechas límite en función de tus horarios.
Nivel intermedio
Aprox. 36 horas para completar
Inglés (English)
Subtítulos: Francés (French), Portugués (de Brasil), Ruso (Russian), Inglés (English), Español (Spanish)
Habilidades que obtendrás
Writing Code in VerilogSimulating FPGA DesignsDesigning FPGA LogicDesigning Test BenchesWriting code in VHDL
Certificado para compartir
Obtén un certificado al finalizar
100 % en línea
Comienza de inmediato y aprende a tu propio ritmo.
Curso 2 de 4 en
Fechas límite flexibles
Restablece las fechas límite en función de tus horarios.
Nivel intermedio
Aprox. 36 horas para completar
Inglés (English)
Subtítulos: Francés (French), Portugués (de Brasil), Ruso (Russian), Inglés (English), Español (Spanish)
ofrecido por
Universidad de Colorado en Boulder
CU-Boulder is a dynamic community of scholars and learners on one of the most spectacular college campuses in the country. As one of 34 U.S. public institutions in the prestigious Association of American Universities (AAU), we have a proud tradition of academic excellence, with five Nobel laureates and more than 50 members of prestigious academic academies.
Comienza a trabajar para obtener tu maestría
Este curso es parte del Master of Science in Electrical Engineering completamente en línea de Universidad de Colorado en Boulder.
Si eres aceptado en el programa completo, tus cursos cuentan para tu título.
Programa - Qué aprenderás en este curso
8 horas para completar
Basics of VHDL
This module introduces the basics of the VHDL language for logic design. It describes the use of VHDL as a design entry method for logic design in FPGAs and ASICs. To provide context, it shows where VHDL is used in the FPGA design flow. Then a simple example, a 4-bit comparator, is used as a first phrase in the language. VHDL rules and syntax are explained, along with statements, identifiers and keywords. Finally, use of simulation as a means of testing VHDL circuit designs is demonstrated using ModelSim, a simulator software tool. Programming assignments are used to develop skills and reinforce the concepts presented.
8 horas para completar
10 videos (Total 48 minutos), 2 lecturas, 6 cuestionarios
10 videos
Why Learn VHDL?1m
FPGA Design Flow3m
Intro to VHDL: Finite State Machine3m
How to speak VHDL, first phrases6m
VHDL Assignments, Operators, Types3m
VHDL Rules and Syntax, Interface Ports3m
VHDL in ModelSim: Download and Install3m
VHDL in ModelSim: Adding to your Toolkit6m
Submitting VHDL Programming Assignments11m
2 lecturas
Misson 2-001: Week 1 Readings2h
Files for Week 1 Programming Assignments10m
2 ejercicios de práctica
VHDL Find the Code Errors30m
Module 1 Quiz30m
12 horas para completar
VHDL Logic Design Techniques
In this module use of the VHDL language to perform logic design is explored further. Many examples of combinatorial and synchronous logic circuits are presented and explained, including flip-flops, counters, registers, memories, tri-state buffers and finite state machines. Methods of hierarchical design and modular design techniques are explained and demonstrated. How to create test benches is described as a means for design verification. Students are giving ample opportunity to practice and refined their design technique using the programming assignments.
12 horas para completar
10 videos (Total 52 minutos), 2 lecturas, 6 cuestionarios
10 videos
Combinatorial Circuits4m
Synchronous Logic: Latches and Flip Flops4m
Synchronous Logic: Counters and Registers6m
Buses and Tristate Buffers3m
Modular Designs: Components, Generate and Loops in VHDL3m
Test Benches in VHDL: Combinatorial8m
Test Benches in VHDL: Synchronous5m
Memory in VHDL7m
Finite State Machines in VHDL8m
2 lecturas
Week 2 Readings2h
Files for Week 2 Programming Assignments10m
1 ejercicio de práctica
Module 2 Quiz30m
7 horas para completar
Basics of Verilog
This module introduces the basics of the Verilog language for logic design. It describes the use of Verilog as a design entry method for logic design in FPGAs and ASICs, including the history of Verilog's development. Then a simple example, a 4-bit comparator, is used as a first phrase in the language. Verilog rules and syntax are explained, along with statements, operators and keywords. Finally, use of simulation as a means of testing Verilog circuit designs is demonstrated using ModelSim, a simulator tool. Programming assignments are used to develop skills and reinforce the concepts presented.
7 horas para completar
9 videos (Total 92 minutos), 2 lecturas, 6 cuestionarios
9 videos
Your First Verilog phrase11m
Verilog Rules and Syntax; Keywords and Identifiers; Sigasi/Quartus editing12m
Verilog Statements and Operators16m
Verilog Modules, Port Modes and Data Types10m
Verilog Structure10m
Testing with ModelSim5m
Verilog Evaluation11m
Submitting Verilog Programming Assignments10m
2 lecturas
Week 3 Readings1h 10m
Files for Week 3 Programming Assignments10m
2 ejercicios de práctica
Verilog Find the Errors20m
Module 3 Quiz30m
10 horas para completar
Verilog and System Verilog Design Techniques
In this module use of the Verilog language to perform logic design is explored further. Many examples of combinatorial and synchronous logic circuits are presented and explained, including flip-flops, counters, registers, memories, tri-state buffers and finite state machines. Methods of hierarchical design and modular design techniques are explained and demonstrated. How to create test benches is described as a means for design verification. Students are giving ample opportunity to practice and refined their design technique by writing code as required by the programming assignments.
10 horas para completar
10 videos (Total 48 minutos), 2 lecturas, 6 cuestionarios
10 videos
Combinatorial Circuits5m
Synchronous Logic: Latches and Flip Flops3m
Synchronous Logic: Counters and Registers5m
Buses and Tristate Buffers3m
Modular Design in Verilog3m
Testbenches in Verilog7m
Testbenches in Verilog II2m
Memory with Verilog4m
Verilog Finite State Machines7m
2 lecturas
Week 4 Readings15m
Files for Week 4 Programming Assignments10m
1 ejercicio de práctica
Module 4 Quiz30m
Reseñas
Principales reseñas sobre HARDWARE DESCRIPTION LANGUAGES FOR FPGA DESIGN
por MS15 de may. de 2020
This course is very helpful in understanding the basics of hardware description languages and now after doing this course i am very much comfortable in using verilog and vhdl language.
por RL1 de may. de 2020
The Verilog course was very good. However the vhdl course could have been better.Needed a bit more clarity on the assignments.The lectures could have used a bit more explanation.
por KK4 de jun. de 2020
This is very good course , but i found some little missing details related to reading materials . But this was really very helpful course for me as fresher .
por R30 de jul. de 2020
The course helped in showing the different styles of the Verilog and VHDL coding. Understood the advantages of Verilog and VHDL in real life applications
Acerca de Programa especializado: FPGA Design for Embedded Systems
The objective of this course is to acquire proficiency with Field Programmable Gate Arrays (FPGA)s for the purpose of creating prototypes or products for a variety of applications. Although FPGA design can be a complex topic, we will introduce it so that, with a little bit of effort, the basic concepts will be easily learned, while also providing a challenge for the more experienced designer. We will explore complexities, capabilities and trends of Field Programmable Gate Arrays (FPGA) and Complex Programmable Logic Devices (CPLD). Conception, design, implementation, and debugging skills will be practiced. We will learn specifics around embedded IP and processor cores, including tradeoffs between implementing versus acquiring IP. Projects will involve the latest software and FPGA development tools and hardware platforms to help develop a broad perspective of the capabilities of various Programmable SoC solutions. Topics include:
Verilog, VHDL, and RTL design for FPGA and CPLD architectures
FPGA development tools flow: specify, synthesize, simulate, compile, program and debug
Configurable embedded processors and embedded software
Use of soft-core and hard-core processors and OS options
FPGA System engineering, software-hardware integration, and testing
IP development and incorporating 3rd-party IP
The capstone course will give the learner the opportunity to practice and implement the concepts covered by building FPGA systems based on low cost evaluation boards.
Preguntas Frecuentes
¿Cuándo podré acceder a las lecciones y tareas?
El acceso a las clases y las asignaciones depende del tipo de inscripción que tengas. Si tomas un curso en modo de oyente, verás la mayoría de los materiales del curso en forma gratuita. Para acceder a asignaciones calificadas y obtener un certificado, deberás comprar la experiencia de Certificado, ya sea durante o después de participar como oyente. Si no ves la opción de oyente:
- es posible que el curso no ofrezca la opción de participar como oyente. En cambio, puedes intentar con una Prueba gratis o postularte para recibir ayuda económica.
- Es posible que el curso ofrezca la opción 'Curso completo, sin certificado'. Esta opción te permite ver todos los materiales del curso, enviar las evaluaciones requeridas y obtener una calificación final. También significa que no podrás comprar una experiencia de Certificado.
¿Qué recibiré si me suscribo a este Programa especializado?
Cuando te inscribes en un curso, obtienes acceso a todos los cursos que forman parte del Programa especializado y te darán un Certificado cuando completes el trabajo. Se añadirá tu Certificado electrónico a la página Logros. Desde allí, puedes imprimir tu Certificado o añadirlo a tu perfil de LinkedIn. Si solo quieres leer y visualizar el contenido del curso, puedes auditar el curso sin costo.
Is financial aid available?
Sí, Coursera ofrece ayuda económica a los estudiantes que no pueden pagar la tarifa. Solicítala haciendo clic en el enlace de Ayuda económica que está debajo del botón “Inscribirse” a la izquierda. Se te pedirá que completes una solicitud. Recibirás una notificación en caso de que se apruebe. Deberás completar este paso para cada uno de los cursos que forman parte del Programa especializado, incluido el proyecto final. Obtén más información.
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