Developing FPGA-accelerated cloud applications with SDAccel: Practice

Distributed systems, data center and cloud architectures are facing the exponential growth in computing requirements and the impossibility for CPU-based solutions to keep pace. Within this context these complex distributed systems have to move toward accelerated computing. Accelerators complement CPU-based architectures and deliver both performance and power efficiency. Moreover, modern data center, as we know, can be used by several different users to serve different workloads and the idea of having an underlying architecture built on reconfigurable technologies seems to provide an ideal fit for these changing, demanding, workloads. This module provides a description of the main cloud computing components and technologies, as well as detailing the current technologies to accelerate cloud computing workloads.

Within this module we are going to have a first taste on how to gain the best out of the combination of the F1 instances with SDAccel providing some few practical instructions on how to develop accelerated applications on Amazon F1 by using the Xilinx SDAccel development environment. Then, we are going to present what it is necessary to create FPGA kernels, assemble the FPGA program and to compile the Amazon FPGA Image, or AFI. Finally, we will describe the steps and tasks involved in developing a host application accelerated on the F1 FPGA.

Within this module we are going to introduce you to the Smith-Waterman algorithm that we have chosen to demonstrate how to create a hardware implementation of a system based on FPGA technologies using the Xilinx SDAccel design framework. We are going to dig into the details of the algorithm from its data structures to the computation flow. Then we are going to introduce the Roofline model and we are going to use it to analyze the theoretical peak performance and the operational intensity of the Smith-Waterman algorithm.