When the terminal small signal voltages vary rather fast, the corresponding changes in the charges in the device cause charging currents to flow through the terminals. Those currents can be modeled by using Capacitance parameters, more precisely, small signal capacitance parameters and we will defines these parameters in this video. I would like to start by, stating that the only effects we are considering, until further notice, here, are compacitive intrinsic effects, in other words, they have to do with the intrinsic part of the device. The intrinsic part of a device is a, is assumed to be outside and for now it does not matter. We are also assuming long channel devices until further notice. Let me begin by a discussion of the gate-source and body-source capacitances. Here is the device that I'm considering, an idealized device where the source and drain regions are not even shown. it is biased with four voltages with respect to an arbitrary reference, represented by ground. So this four DC voltages are VG0, VS0, VB0 and VD0. And they give rise to a depletion region charge, QB0. And the gate charge is QG0. I would now like to change the source voltage and see what effect it will have on the body charge and the gate charge. So I apply a small change in the source voltage, delta VS. This will cause a change in the depletion inter-charge delta QB and a change in the gate-charge delta QG. Let me first try to model the effect of delta VS on delta QG. The voltage and the charge are related to each other. Through a small signal capacitance. So, I will attempt to connect a small signal capacitance between source and gate, and try to find the rate value for it. Notice that because we're talking about small signal equivalent circuits. Voltages that are constant, for example VG0, have a delta v that is zero and therefore they correspond to ground. Details about this concept can be found in basic electronic circuits books. So here we are. This is the voltage I'm applying to the source. It has a value delta Vs. This is a capacitance CGS, which goes to the gate that is connected to small signal ground corresponding to a fixed VGO over here. Notice that I'm applying a delta VS at the bottom plate of CGS, and the top plate is connected to ground. Now, we know that the charge, the small-signal charge that entered the gate in order to change the gate charge, was Delta QG. So this is Delta QG. And you can see that this Delta QG becomes minus CGS Delta VS. So I can write Delta QG is minus CGS Delta VS, and from that if you solve for CGS, you find this. So CGS is approximately minus delta QG delta VS. And the approximate sine will become an exact sine as I take delta Vs and allow them to go towards zero, in which case this will become a partial derivative. And we have done something very similar for conductances before. Now just like I define capacitance in this way between gate and source, I can define one between body and source, CBS. And that will be given by minus delta QB over delta vs, using the same line of reason. So, this is then what will lead us to the definitions of the Gate-source and body-source capacitance. Let me now consider gate drain and body drain capacitance. So now, I have the original circuit, I will now vary the drain voltage. By an amount delta V D. That will change the gate, the body charge by delta Q B and the gate charge by delta Q G. And using the same reasoning as before I can define Cgd by taking the ratio of minus delta QG over delta VD, and Cbd, the body drain capacitance By taking the ratio minus delta QB over delta VD. And more precisely, I will define this by partial derivatives in a moment. Once more capacitance to be defined. This is the Gate body capacitance. Now we'll vary the body voltage by an amount delta VB, that will change the gate charge by some amount, delta QG, because of course, once you vary the body voltage, you're varying the distribution of charges in the channel. And in the depletion region the total charge in here will change and that must balanced by a gate charge. So, the gate charge in general is expected to change. And using the same line of reasoning as before, I will take CGB and make it minus delta QG over delta VB So these are the five capacitances I will define in this video. And more precisely, I will now allow the delta Vs to go to zero, and I get partial derivatives. So Cgs becomes the partial derivative of the gate charge with respect to the source voltage. Cgd is minus dQG dVD, Cbs is minus dQB dVS, Cbd is minus dQB dVD and Cgb is minus dQG dVB. Notice that we have explained the reasoning behind the minus sign, and of course the subscripts correspond to, to the order in which The quantities are taken. For example Cgd is dQG dVD. So it's easy to remember what each of these capacitance represents. Now notice that our independent variables in all this discussion were 4 voltages with respect to ground, VG, VS,VD, and VB. And when we take the partial derivative with respect to one variable it is implied that the other three are kept constant. For example CGS is dQg dVs assuming that Vg, Vd, and Vb are being held constant. Now if you add those capacitances. Across the corresponding terminals, cgs, cgd, cbs, and cbd, and cgb. And you add to the initial small signal equivalent circuit we had derived for the drain source path. You end up with this equivalent circuit. For simplicity I am not showing the corresponding small signal conductances that are related to the gate leakage and the body leakage. If you want you can add those too. This is simply enough. And in some cases, adequate enough. So we will not go farther than that. Now, this model, is not complete in the sense I chose to take five main capacitances and stay with only those. There are additional capacitances what you can define, and we will have a chance to talk about that later. But it can be shown that more complete models reduce to this one, assuming the frequency of operation is not too high. And this, the limit of validity of this model is about a tenth. To maybe half of omega zero, where omega zero is defined as this. This conclusion here comes from considerations of higher order models that we will see later on. I forgot to mention that when we added the capacitance here, we have to make sure that there is no interference with these new elements. The original elements we had in the model, and in fact the reason such interference. This is actually described in the book and I would urge you to read it there. So in this short video we have defined the main capacitance's, terminal to terminal capacitance's of the device. And showed how they can be and we have shown how they can be added to the small signal equivalent circuit. In the next video, I will discuss how we can compute the values of these small signal capacatives.