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Opiniones y comentarios de aprendices correspondientes a Hardware Description Languages for FPGA Design por parte de Universidad de Colorado en Boulder

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432 calificaciones
122 reseña

Acerca del Curso

This course can also be taken for academic credit as ECEA 5361, part of CU Boulder’s Master of Science in Electrical Engineering degree. Hardware Description Languages for Logic Design enables students to design circuits using VHDL and Verilog, the most widespread design methods for FPGA Design. It uses natural learning processes to make learning the languages easy. Simple first examples are presented, then language rules and syntax, followed by more complex examples, and then finally use of test bench simulations to verify correctness of the designs. Lecture presentations are reinforced by many programming example problems so that skill in the languages is obtained. After completing this course, each student will have fundamental proficiency in both languages, and more importantly enough knowledge to continue learning and gaining expertise in Verilog and VHDL on their own....

Principales reseñas

JS
6 de jun. de 2021

I really liked this course . if someone wants to know how digital circuits are made inside of computer then this course could be proven as turning point in his way of learning .

KK
4 de jun. de 2020

This is very good course , but i found some little missing details related to reading materials .\n\nBut this was really very helpful course for me as fresher .

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101 - 123 de 123 revisiones para Hardware Description Languages for FPGA Design

por Muhammad Z Y

7 de abr. de 2020

Course content is moderate. But also have complexity level higher for a beginner.

por Uzair A

9 de oct. de 2020

its a very nice course. Its help me a lot to understand the basic of fpga.

por Apoorva S

25 de may. de 2020

A very engaging course to do for beginners having fundamentals strong.

por Yuvraj S R

18 de may. de 2020

Explanations are not that good for some circuits like memory

por Sourav N

18 de sep. de 2020

There should have been more examples of problems.

por MOHAMED C

30 de abr. de 2020

a big thank you to all the professiors

por Engels M

3 de dic. de 2021

Concise, practical and useful

por Prakash K R

24 de jun. de 2020

It should be more elaborative

por TUMMALAPALLI S V N S

7 de jun. de 2020

BEST FOR THE BASIC

por J S

5 de ago. de 2020

good

por Julien T

7 de dic. de 2021

I​nteresting course but exercises shall be reworked as sometimes it's not clear what is the expected output so we end up guessing via the testbench. Another issue is that some half backed quizzes prevent you from practicing the exercises until you pass even though practicing is key to understand the concepts...

por Islam E

31 de may. de 2020

this course need a person who knows before the basics of both VHDL/Verilog. because i know some basics of VHDL i understood its part but verilog was a little bit hard to me to understand it

por Harsh A

15 de jun. de 2020

Verilog part is explained very well but VHDL part completely unsatisfied.

por Sachin A

21 de abr. de 2020

Very introductory. Verilog and VHDL exercises are copied.

por Sakshat R

28 de may. de 2020

Innovative teaching, but very poor assignments

por Samuel C

14 de ago. de 2020

A decent introduction to HDL.

por Pushkar A

30 de sep. de 2020

Teaching could be better.

por JYOTI S S

11 de jul. de 2021

good

por Rishi D

12 de jun. de 2020

teacher as well as way of teaching is not good . assignments are great though

por Ethan R

11 de abr. de 2020

The highlight of this course was the recommended reading materials.

por Surabhi M

8 de nov. de 2020

not clear.

por saikumar s

31 de oct. de 2020

There is no technical support

por Muhammet M K

23 de ago. de 2021

awful